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SR870BN4 Error Reference Guide POST Codes

Revision 1.0

0x07BB BSP Hang on ERROR. South

0x87BA BSP Feed system information (0x1) with call to SAL_C. South

0x07BA BSP Hang on ERROR. South

0x87B9 BSP Initialize MP table v1.4 (0x2) with call to SAL_C South

0x07B9 BSP Hang on ERROR. South

0x87B8 BSP Initialize IA-32 ACPI v1.1 (0x3) with call to SAL_C South

0x07B8 BSP Hang on ERROR. South

0x87B7 BSP Initialize IA64 ACPI v1.1 (0x4) with call to SAL_C South

0x07B7 BSP Hang on ERROR. South

0x87B6 BSP Initialize IA-32&IA64 ACPI v2.0 (0x5) with call to SAL_C South

0x07B6 BSP Hang on ERROR. South

0x87B5 BSP Clear scratch memory (0xFFF) with call to SAL_C South

0x07B5 BSP Hang on ERROR. South

0x87B4 BSP Search FIT for EFI module with call to PELoader. Get Size, align, and scratch

buff size.

South

0x07B4 BSP Hang on ERROR. Get entry point, and GP value. South

0x87B3 BSP Load image by module type (sal_c_module_17). South

0x07B3 BSP Hang on ERROR. Get entry point, and GP value. South

0x87B2 BSP Flush cache with PAL call. South

0x07B2 BSP Hang on ERROR. South

0x87B1 BSP Build EFI input parameter table. Get EFI stack, bspstore etc. with EFI call. South

0x07B2 BSP Hang on ERROR. South

0x87B0 BSP Build EFI input parameter table. Get EFI stack, bspstore etc. with EFI call.

Store EFI stack, bspstore etc. with EFI call. Call EFI and that should be end.

South

0x07B0 BSP Hang on ERROR if OK come back from EFI. South

7.2.2.4 IA-32 Module

The IA-32 POST codes all have the Most Significant Bit (MSB) cleared by the convention

established above in this document. Also, the IA-32 POST codes don’t fall into the module

definition for Itanium-based platforms above. The codes shown here are consistent with the 7.0

AMI* core.

Table 9. IA-32 POST Codes

Code Value Module Display

0x00D0 Power-on delay is starting. Next, the initialization code checksum will be verified. South

0x00D1 Initializing the Direct Memory Access (DMA) controller, performing the keyboard

controller BAT test, starting memory refresh, and entering 4 GB flat mode next.

South

0x00D3 Starting memory sizing next. South

0x00D4 Returning to real mode. Executing any OEM patches and setting up the stack next.

South

0x00D5 Passing control to the uncompressed code in shadow RAM at E000 0000h.The

initialization code is copied to segment 0 and control will be transferred to segment 0.

South

0x00D6 Control is in segment 0. If the system BIOS checksum is bad, will next go to checkpoint

code E0h. Otherwise, going to checkpoint code D7h.

South

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 ... 43 44

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Dell PowerEdge 7250 Guide de l'utilisateur Page 31

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